module vga_controller_640_60_1 (F, vgadisp,hcounter, vcounter,blank);

	input [3:0] F;
	output reg vgadisp;
	input blank;
	input [10:0] hcounter, vcounter;
always@(*)	begin
case(F)
4'd1: begin 
	vgadisp= ~blank &&
	(vcounter>= 83 && vcounter<92 && hcounter>=46 && hcounter< 76) || (vcounter>= 47 && vcounter<83 && hcounter>=58 && hcounter< 64) || (vcounter>= 47 && vcounter<56 
	&& hcounter>=52 && hcounter< 58)||(vcounter>= 56 && vcounter<65 && hcounter>=46 && hcounter< 52);
end
4'd2: begin
vgadisp=~blank &&
(vcounter>= 47 && vcounter<56 && hcounter>=52 && hcounter< 76) ||(vcounter>= 65 && vcounter<74 && hcounter>=52 && hcounter< 76)
			||(vcounter>= 83 && vcounter<92 && hcounter>=52 && hcounter< 76)
			||(vcounter>= 56 && vcounter<65 && hcounter>=70 && hcounter< 76)
		||(vcounter>= 74 && vcounter<83 && hcounter>=52 && hcounter< 58);
end
4'd3: begin
vgadisp=~blank &&
(vcounter>= 47 && vcounter<56 && hcounter>=52 && hcounter< 76) ||
			(vcounter>= 65 && vcounter<74 && hcounter>=52 && hcounter< 76) ||
			(vcounter>= 83 && vcounter<92 && hcounter>=52 && hcounter< 76) ||
			(vcounter>= 56 && vcounter<65 && hcounter>=70 && hcounter< 76) ||
			(vcounter>= 74 && vcounter<83 && hcounter>=70 && hcounter< 76) ;
			end   
default: begin
end
endcase
end
endmodule